veryl (lang/veryl) Updated: 7 months ago Add to my watchlist

Veryl: A Modern Hardware Description Language

Veryl: A Modern Hardware Description Language. Veryl is designed as a "SystemVerilog Alternative". There are some design concepts: it has a simplified syntax based on SystemVerilog/Rust, transpiles to SystemVerilog, generates human-readable SystemVerilog code, and comes with integrated tools like a formatter/linter, and integrates with VSCode.

Version: 0.15.0 License: (Apache-2 or MIT)

GitHub

Maintainers	herbygillot
Categories	lang
Homepage	https://github.com/veryl-lang/veryl
Platforms	darwin
Variants	universal (Build for multiple architectures)

"veryl" depends on

lib (1)

libunwind

build (4)

cargo

clang-17

legacy-support

rust

fetch (1)

git

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veryl seems to have been updated (port version: 0.15.0, new version: 0.17.0)

livecheck ran: 1 day, 15 hours ago

veryl (lang/veryl) Updated: 7 months ago Add to my watchlist 0