verilator (science/verilator) Updated: 1 year, 3 months ago Add to my watchlist

Verilog compiler and simulator

Verilator is a Verilog compiler and simulator.

Version: 5.028 License: (LGPL-3 or Artistic-2) GitHub
Displaying statistics for 1,164 users who made submissions during: until

Statistics for selected duration

2025-Nov-15 to 2025-Dec-15


Total Installations 4
Requested Installations 4


macOS Versions

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Quick Links:
MacPorts
Port Information was updated:
2 hours ago
fdc741d4

Most recent build (in app's database) ran:
4 hours ago

Latest stats submission was received:
11 minutes ago