verilator (science/verilator) Updated: 1 year, 3 months ago Add to my watchlist

Verilog compiler and simulator

Verilator is a Verilog compiler and simulator.

Version: 5.028 License: (LGPL-3 or Artistic-2) GitHub
Displaying statistics for 1,193 users who made submissions during: until

Statistics for selected duration

2025-Dec-12 to 2026-Jan-11


Total Installations 5
Requested Installations 5


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Quick Links:
MacPorts
Port Information was updated:
an hour ago
f71a97ee

Most recent build (in app's database) ran:
an hour ago

Latest stats submission was received:
26 seconds ago