Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate C++ code that is compiled and linked with a run time library (called "vvm") then executed as a command to run the simulation. For synthesis, the compiler generates netlists in the desired format.
Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate C++ code that is compiled and linked with a run time library (called "vvm") then executed as a command to run the simulation. For synthesis, the compiler generates netlists in the desired format.
To install iverilog, run the following command in macOS terminal (Applications->Utilities->Terminal)
sudo port install iverilog
To see what files were installed by iverilog, run:
port contents iverilog
To later upgrade iverilog, run:
sudo port selfupdate && sudo port upgrade iverilog
Reporting an issue on MacPorts Trac
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