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Alliance, CAD and libraries for VLSI designAlliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided
Version: 5.0-20110203 License: GPL GitHubMaintainers | No Maintainer |
Categories | science |
Homepage | https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/ |
Platforms | darwin |
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last updated: 1 day, 9 hours ago