alliance (science/alliance) Add to my watchlist
Alliance, CAD and libraries for VLSI designAlliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided
Version: 5.0-20110203 License: GPL
GitHub
Statistics for selected duration
2024-Dec-14 to 2025-Jan-13
No stats available for this selection.
Try changing the range of days. Alternatively visit statistics page to have an overall look at the submitted statistics.