GET /api/v1/ports/verilator/
HTTP 200 OK
Allow: GET, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "name": "verilator",
    "portdir": "science/verilator",
    "version": "5.028",
    "license": "(LGPL-3 or Artistic-2)",
    "platforms": "darwin",
    "epoch": 0,
    "replaced_by": null,
    "homepage": "https://github.com/verilator/verilator",
    "description": "Verilog compiler and simulator",
    "long_description": "Verilator is a Verilog compiler and simulator.",
    "active": true,
    "categories": [
        "science",
        "electronics"
    ],
    "maintainers": [
        {
            "name": "mcalhoun",
            "github": "MarcusCalhoun-Lopez",
            "ports_count": 1405
        }
    ],
    "variants": [
        "universal"
    ],
    "dependencies": [
        {
            "type": "build",
            "ports": [
                "autoconf",
                "automake",
                "bison",
                "flex",
                "libtool",
                "help2man",
                "clang-17"
            ]
        },
        {
            "type": "lib",
            "ports": [
                "perl5.36",
                "python311"
            ]
        }
    ],
    "depends_on": []
}