{"name":"alliance","portdir":"science/alliance","version":"5.0-20110203","license":"GPL","platforms":"darwin","epoch":0,"replaced_by":null,"homepage":"https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/","description":"Alliance, CAD and libraries for VLSI design","long_description":"Alliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided","active":true,"categories":["science"],"maintainers":[],"variants":["universal"],"dependencies":[{"type":"build","ports":["clang-9.0"]},{"type":"lib","ports":["openmotif","xpm"]}],"depends_on":[]}